IIIT Delhi and IEEE | Workshop on VLSI Revisited: from Analog to Digital; Apply Now!
Overview:
Applicants are invited to the workshop on VLSI ReVisited: from Analog to Digital, offered by IIIT Delhi and IEEE.
Workshop Contents:
- Week-1 (20-24 June): Digital VLSI and Memory Design
- Week-2 (27 June – 1 July): Analog IC Design
- Week-3 (4-8 July): Mixed-Signal Design
- Week-4 (11-15 July) : Computer Architecture & SoC
- Week-5 (18-22 July) : ASIC Design & Verification
Who should Attend:
- Faculty wishing to get exposed to the VLSI EDA tool-set and modern online pedagogy
- Research scholars starting off with research in VLSI
- Industry professionals intending to refresh basic concepts to broaden their scope of contribution
- Recent graduates joining as a Circuit (and/or) System designers in a VLSI organization
- Final year B.Tech/ M.Tech students looking for making a career in VLSI either in industry or academia
- M.Tech students intending to get exposure to and choose a career path in VLSI
- Pre-final year B.Tech students toying with the idea of VLSI as a career option
- This is a Refresher program. Students who haven’t done similar coursework may find the sessions very fast-paced. However, most 3rd-year B.Tech students are able to manage well and use this summer course as a glimpse of what to expect when they pursue a specialization in VLSI Design
Duration:
20th June 2022 to 29th July 2022